Variable gain signal amplifiers are used by the communications industry in a variety of products, such as up converters and down converters for Code Division Multiple Access (CDMA) systems. It is well known that, in handling RF signals, signal radiation within the amplifying circuit may occur and cause uncontrolled feedback that prevents the circuit from operating. Accordingly, feedback in an amplifier needs to be controlled. Furthermore, as the gain of the amplifier is varied to respond to differing frequency characteristics of the input signals, controlled feedback may be used to provide a signal output that is uniform over a wide frequency band.
It is known to use an amplifier with a gain that can be switched between two operating states. The operating state of the amplifier determines how much gain or attenuation may be inserted between the input signal and the output signal of the amplifier. The operating state of the amplifier may be varied by controlling the impedance in the feedback path of the amplifier. Such an amplifier is taught by Schroder in U.S. Pat. No. 4,099,134, issued Jul. 4, 1978.
As shown in FIG. 1, Schroder teaches an amplifying circuit with a gain switched between two states using two mutually coupled switches 7 and 13. Switches 7 and 13 are formed by a single, double-pole, double-throw switch. An input signal at terminal 1 is fed to non-inverting input 2 of differential amplifier 4. The output 5 of differential amplifier 4 is connected via contact 6 of switch 7 to output terminal 9.
Output 5 of amplifier 4 is connected through a series connection of a first impedance 14 and a second impedance 18 to a ground reference potential. The first impedance 14 has an impedance value that is variable through a control voltage applied at terminal 16. Connecting point 17 between the two impedances 14 and 18 is connected, via contact 12 of switch 13, with inverting input 3 of amplifier 4. In this way, impedances 14 and 18 form a negative feedback path for amplifier 4, which is controlled by a voltage at terminal 16.
In the illustrated position of switches 7 and 13, an increase of the impedance value of first impedance 14 results in an increase in the gain of amplifier 4. If the circuit shown is switched to its other possible operation state by actuation of the mutually coupled switches 7 and 13, then a feedback path is formed from output 5 via a d.c. path 10 and contact 11 to inverting input 3 of amplifier 4. In this condition, the amplifier 4 has a gain of approximately one. Thus, the signal at output 5 is the same as the non-inverting input 2 of the amplifier 4. The circuit acts as if output 5 is electrically connected to input terminal 1.
Another amplifier circuit is disclosed in U.S. Pat. No. 5,530,402 (issued to Wright) and illustrated in FIG. 2 as sequential amplifier circuit 20. In FIG. 2, the circuit 20 includes a signal input line 22 ("IN") coupled to the amplifier 23 via a first switch 25. The output signal from amplifier 23 is gated to the input of a two-port delay line 26 ("D.L.") via a second switch 27. A switch controller 21 ("SWITCH") controls the movable arms of first and second switches 25 and 27. As the signal emerges from delay line 26, switch controller 21 causes the movable arm of first and second switches 25 and 27 to respectively move to the other position. Consequently, the emerging signal from delay line 26 enters amplifier 23 and is again amplified and exits circuit 20 through an output line 24 ("OUT"). Thus, amplifying circuit 20 provides double amplification. In the first state of switch controller 21, a first amplification is provided and the signal is passed through a delay line. In the second state of switch controller 21, a second amplification is provided as the signal emerges from the delay line.
The amplifier circuits shown in FIGS. 1 and 2 work well for the purposes disclosed. Nevertheless, implementation of these circuits has proven inefficient. Some portions of the amplifier circuits are typically implemented on a chip, while other portions are implemented off-chip. For example, the differential amplifier and the delay line discussed above are typically implemented on the chip and may be densely packaged. The switches are implemented off-chip, however, separated from the amplifier or the delay line, and cannot be densely packaged as an integral unit.
The deficiencies of the conventional RFIC amplifiers show that a need still exists for an improved device. To overcome the shortcomings of the conventional devices, a new RFIC amplifier is provided. An object of the present invention is control the amount of gain provided by the amplifier, while also shaping the gain and return losses of the amplifier. A related object is to shape the gain and return losses of the amplifier so that signal reflection is avoided at the input side, as well as the output side, of the amplifier.
Yet another object of the present invention is to provide a gain-controlled amplifier circuit that may be fabricated almost entirely on-chip (on the substrate) and without the need for negative voltage. Another object is to provide a circuit that may be more densely packaged as compared to conventional amplifiers with switches implemented off-chip. A related object is to provide a configuration that yields packages that are smaller in size and have lower cost than conventional packages.
Still another object of the present invention is to provide a gain-controlled amplifier circuit that may be used as an effective gain control for RFIC amplifiers in up converters and down converters used in CDMA systems. A related object is to provide a circuit that may also be used as an effective gain control for any low noise RF amplifier or any amplifier requiring a high gain mode and a low gain standby mode.